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**Los pads de SMD suelen ser rectangulares aunque los empaquetados SOIC suelen usar pads ovales con el pin 1 rectangular
**Los pads de SMD suelen ser rectangulares aunque los empaquetados SOIC suelen usar pads ovales con el pin 1 rectangular
*Vias
*Vias
**Profesionalmente se hacen plateando las vias para interconectar las pistas (PTH - Plated Trough Hole)
**Suelen ser de 0.5-0.7mm
*Clearances


<pre>
<pre>
Vias connect the tracks from one side of your board to another, by way of a hole in your board. On all but
Electrical clearances are an important requirement for all boards. Too tight a clearance between tracks and
cheap home made and low end commercial prototypes, vias are made with electrically plated holes, called
pads may lead to “hairline” shorts and other etching problems during the manufacturing process. These can
Plated Through Holes (PTH). Plated through holes allow electrical connection between different layers on
be very hard to fault find once your board is assembled. Once again, don’t “push the limits” of your
your board.
manufacturer unless you have to, stay above their recommended minimum spacing if at all possible.
What is the difference between a via and a pad? Practically speaking there is no real difference, they are
At least 15 thou is a good clearance limit for basic through hole designs, with 10 thou or 8 thou being used for
both just electrically plated holes. But there are differences when it comes to PCB design packages. Pads
more dense surface mount layouts. If you go below this, it’s a good idea to consult with your PCB
and Vias are, and should be, treated differently. You can globally edit them separately, and do some more
manufacturer first.
advanced things to be discussed later. So don’t use a pad in place of a via, and vice-versa.
For 240V mains on PCB’s there are various legal requirements, and you’ll need to consult the relevant
Holes in vias are usually a fair bit smaller than component pads, with 0.5-0.7mm being typical.
standards if you are doing this sort of work. As a rule of thumb, an absolute minimum of 8mm (315 thou)
Using a via to connect two layers is commonly called “stitching”, as you are effectively electrically stitching
spacing should be allowed between 240V tracks and isolated signal tracks. Good design practice would
both layers together, like threading a needle back and forth through material. Throw the term stitching a few
dictate that you would have much larger clearances than this anyway.
times into a conversation and you’ll really sound like a PCB professional!
For non-mains voltages, the IPC standard has a set of tables that define the clearance required for various
voltages. A simplified table is shown here. The clearance will vary depending on whether the tracks are on an
internal layers or the external surface. They also vary with the operational height of the board above sea
level, due to the thinning of the atmosphere at high altitudes. Conformal coating also improves these figures
for a given clearance, and this is often used on military spec PCBs.
</pre>
</pre>
*Polygons
*Clearances

Revisión del 23:37 6 dic 2014

FP

  • Anchura pista
    • MIN 12mils
    • PREF 40mils (VCC i GND 40mils)
  • Distancia
    • Entre pistas 100mils
    • Pistas y PCB 200mils
    • Componentes 150mils
    • Pad y pista 100mils
  • Agujeros
    • 0.8mm para Resistencias de 1/4W



Fabricación casera que consigo

  • Anchura pista
    • MIN 20mils
  • Distancia
    • Entre pistas 14mils



Manual Kicad - Miguel Pareja

  • Módulo
  • Pad, vias o isletas
    • Taladros de fijacion
    • Vias
  • Pistas
    • Ancho de pista
      • Depende de los amperios que pasan
      • Para corrientes menores a 300 miliamperios, un valor mínimo de ancho de pista de 0,5 milímetros (20mil)
      • Para mayores corrientes, se puede escoger la norma de 0,5 milímetros (20mil) de ancho de pista por cada amperio, como valor límite o mínimo. Algunos autores recomiendan la norma de 1 milímetro (39mil) de ancho de pista por cada amperio para un valor estándar de recubrimiento de cobre de la placa de circuito impreso de 35 micras.
      • La anchura mínima de las pistas de alimentación será de 2 milímetros (78 mil).
    • Separación entre pistas
      • Depende del voltaje que cae en el componente



PCB Layout Tutorial by David L. Jones

http://server.ibfriedrich.com/wiki/ibfwikien/images/d/da/PCB_Layout_Tutorial_e.pdf

  • Grid
    • Submultiplos de 100mils (50,25,20,10, 5)
    • Comenzar con 50mils he ir bajando si los componentes tienen que caber en un espacio reducido
  • Ancho pistas
  • Pads
    • Parametro importante, pad/hole ratio
      • Cada fabricante tiene su ratio
      • Una regla es que el pad tiene que ser 1.8 veces el diametro del hole o al menos 0.5mm mas largo
    • Los pads de las resistencias, diodos, condensadores deben ser redondos de al menos 70mils de diametro
    • Los pads de los DIL (Dual In Line) se hacen ovales
      • 60mils de alto por 90-100mils de ancho
      • El Pin 1 suele ser rectangular para diferenciarlo
    • Los pads de SMD suelen ser rectangulares aunque los empaquetados SOIC suelen usar pads ovales con el pin 1 rectangular
  • Vias
    • Profesionalmente se hacen plateando las vias para interconectar las pistas (PTH - Plated Trough Hole)
    • Suelen ser de 0.5-0.7mm
  • Clearances
Electrical clearances are an important requirement for all boards. Too tight a clearance between tracks and
pads may lead to “hairline” shorts and other etching problems during the manufacturing process. These can
be very hard to fault find once your board is assembled. Once again, don’t “push the limits” of your
manufacturer unless you have to, stay above their recommended minimum spacing if at all possible.
At least 15 thou is a good clearance limit for basic through hole designs, with 10 thou or 8 thou being used for
more dense surface mount layouts. If you go below this, it’s a good idea to consult with your PCB
manufacturer first.
For 240V mains on PCB’s there are various legal requirements, and you’ll need to consult the relevant
standards if you are doing this sort of work. As a rule of thumb, an absolute minimum of 8mm (315 thou)
spacing should be allowed between 240V tracks and isolated signal tracks. Good design practice would
dictate that you would have much larger clearances than this anyway.
For non-mains voltages, the IPC standard has a set of tables that define the clearance required for various
voltages. A simplified table is shown here. The clearance will vary depending on whether the tracks are on an
internal layers or the external surface. They also vary with the operational height of the board above sea
level, due to the thinning of the atmosphere at high altitudes. Conformal coating also improves these figures
for a given clearance, and this is often used on military spec PCBs.
Obtenido de «https://wiki.erikcrane.com/index.php?title=Diseño_PCB&oldid=4650»